![]() ![]() One promising solution is to exploit the hyperdimensional computing paradigm 22, 23. Recently, several pioneering works aim to solve the problem with memristor-based hardware. Most existing demonstrations mentioned above, however, mainly focus on executing matrix multiplications for accelerating DNNs with crossbar structures 8, 9, 10, 11, 12, 17, 18, 21, whose experience cannot be directly applied to the models with explicit external memories in MANNs. Those solutions are based on the memristor’s ability to directly process analog signals at the location where the information is stored. The performance in a traditional von Neumann computing architecture 4 is thus bottlenecked in hardware by memory bandwidth and capacity issues 5, 6, 7, especially when they are deployed in edge devices, where energy sources are limited.Įmerging non-volatile memories, e.g., memristors 8, have been proposed and demonstrated to solve the bandwidth and memory capacity issues in various computing workloads, including DNNs 9, 10, 11, 12, 13, 14, signal processing 15, 16, scientific computing 17, 18, solving optimization problems 19, 20, and more. ![]() This is because the entire external memory module needs to be accessed from the memory to recall the learned knowledge, which greatly increases the memory overhead. While those models have shown the ability to generalize from rare cases, they have struggled to “scale up” 2, 3. Inspired by our brain, recent machine learning models such as memory-augmented neural networks (MANN) 1 have adopted a similar concept, where explicit external memories are applied to store and retrieve learned knowledge. On the other hand, our biological brain can learn patterns from rare classes at a rapid pace, which could relate to the fact that we can recall information from an associative, or content-based addressable, memory. The successful demonstration paves the way for practical on-device lifelong learning and opens possibilities for novel attention-based algorithms that were not possible in conventional hardware.ĭeep neural networks (DNNs) have achieved massive success in data-intensive applications but fail to tackle tasks with a limited number of examples. Simulations show that such an implementation can be efficiently scaled up for one-shot learning on more complex tasks. The successful demonstration is supported by implementing new functions in crossbars, including the crossbar-based content-addressable memory and locality sensitive hashing exploiting the intrinsic stochasticity of memristor devices. In this work, we experimentally validated that all different structures in the memory-augmented neural network can be implemented in a fully integrated memristive crossbar platform with an accuracy that closely matches digital hardware. Memory-augmented neural networks have been proposed to achieve the goal, but the memory module must be stored in off-chip memory, heavily limiting the practical use. Copy the Attribution License: Font generated by on-device learning is a key challenge for machine intelligence, and this requires learning from few, often single, samples. ![]()
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